MU
Semiconductors (memory)
Micron Technology
Memory chips: DRAM, NAND and high-bandwidth memory (HBM), the memory stacked next to AI accelerators.
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Moat
Scale and long contracts in a shortage. The risks are the cycle, CXMT in standard DRAM and NVIDIA's push to standardise HBM.
| Physical assets & scale | Strong | A little over 20% of global DRAM capacity, and each HBM generation needs more wafers, so new supply takes years and billions. |
| Switching costs | Strong, contracted | Take-or-pay agreements with strategic customers: about $134 billion of remaining performance obligations in the FY2026 10-K, up from $5 billion a quarter earlier. |
| Technology & roadmap | Competitive | A yearly HBM cadence out to HBM6 in 2030 and custom base-die work with NVIDIA, but its HBM revenue share fell from about 21% to 17% in Q2. |
| Regulation & supply chain | Supportive | US fabs (Clay, NY, ahead of schedule) and a domestic indium supply line fit the push to cut reliance on China. |
| Owner-operator | Low | Run by professional managers, not a founder with a large stake. |
As of 28 Oct 2026. How we grade moats
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28 OctMUSK Hynix Q3 results confirm the upturn is accelerating…27 OctMU3-5 year long-term contracts, Samsung overtakes in HBM, CXMT turns down orders…26 OctMUSK Hynix special dividend signal, cracks in Taiwan labour deal…25 OctMUNAND price rises now led by enterprise, not consumer24 OctMUMicron's global quarterly profit-sharing details (Taoyuan union 99% against)…23 OctMUNew Taiwan labour package, small Taoyuan strike and talks pushed to 27 Oct…22 OctMUMicron tech workshop (CTPO DeBoer): management guides 'memory undersupply persists…21 OctMUStrategic investment in US indium refining to cut China dependence…20 OctMUTaoyuan union plans one-day solidarity strike on 22 Oct…19 OctMU10-K discloses $134 billion of RPO, NVIDIA standardises NVHBM specification on TSMC…